The present invention relates to improvements in a digital, stored program computer and more particularly to improvements in the handling of traffic of information between a computer memory and its processing facility including the circuitry which performs arithmetic and logic operations on data.
The speed of a computer is primarily determined by access speed to information that is to be processed and by the speed with which processed information can be stored for safe keeping until needed either for further processing or for outputting. Since any storage facility must be capable of storing individual bits of information, e.g. binary bits, the fastest computer conceivable is obviously one whose memory is composed of storage elements to the bit level incorporating the highest available technology as to access speed. A single TTL flip flop has access times in the vicinity of 10 nanoseconds, emitter coupled flip flops require only about half that time. Of course, a random access memory constructed from such elements will have additional gating and decoding delays, minimized, however, by maximum speed electronics.
A computer having exclusively such elements as storage facility would not only be fast, but also frightfully expensive because the cost per bit is about hundred fold the per bit cost of a conventional core memory. Therefor, large random access memories as needed in computers cannot use normally storage facilities considerably more expensive than magnetic cores.